1. Field of the Invention
The present invention relates to a filter circuit, more particularly relates to an active filter circuit called a transconductor-C (Gm-C), and a transconductor serving as a component of a filter circuit.
2. Description of the Related Art
In an integrated filter circuit including an active filter, for example, a Gm-C filter, it is desirable to enable easy, linear adjustment of a cut-off frequency fc while maintaining a Q factor of the filter.
A waveform equalizing technique as represented by partial response-maximum likelihood (PRML) is generally applied to a stored data reproduction system (read channel) for reproducing stored information from an information storage medium such as a magnetic or optical disk. Normally, in a signal waveform reproduced via an optical pickup or a magnetic head from a storage medium, large signal leakage occurs between adjacent bit data; namely, large inter-symbol interface (ISI), such that reproduction of data only by the signal level of the sampling time is difficult. The partial response (PR) technique and other techniques enable high density recording and reproduction combined together with a later stage Viterbi decoding algorithm etc. by permitting ISI for only two to five adjacent sampling times, while eliminating signal leakage in other sampling times.
By taking as an example a magnetic medium wherein a reproduced signal is inherently a differential system, the equalization method used is a differential series such as PR4 (equalizing a write code 1 to three adjacent sample rows 1, 0, and xe2x88x921), EPR4 (similarly equalizing it to 1, 1, xe2x88x921, and xe2x88x921), and EEPR4 (similarly equalizing it to 1, 2, 0, xe2x88x922, and xe2x88x921). Specifically, a high frequency enhanced analog low pass filter is used as an equalizer. For example, a 7-pole 2-zero filter comprising a Gm-C biquadratic filter is proposed by Geert A. De Veirman and Richard G. Yamasaki in xe2x80x9cDesign of a Bipolar 10-MHZ Programmable Continuous-Time 0.05xc2x0 Equiripple Linear Phase Filterxe2x80x9d, IEEE Journal of Solid-State Circuits, vol. 27, no. 3, March 1992. This filter configuration has the linearity of phase characteristic required by a digital read channel; that is, a good, constant group delay characteristic, and is generally used as an analog equalizing filter.
FIG. 5 is a block diagram of the configuration of the filter.
As shown in the figure, the filter comprises cascade-connected biquadratic filters/equalizers 101 (biquad1/equalizer), 102 (Biquad2), and 103 (Biquad3) and low pass filter (LPF) 104. Note that the biquadratic filter/equalizer 101 has an equalizing function. In the filter configuration shown in FIG. 5, a reproduced signal Sin is controlled in gain, then input to the first stage biquadratic filter/equalizer 101 and there adjusted in high frequency boost and equalized. Then, together with the biquadratic filters/equalizers 102 and 103 and the low pass filter 104 connected thereafter, a phase characteristic having a constant group delay is attained. According to Veirman and Yamasaki, the pole frequencies and Q factors of the filter components are as shown in FIG. 6.
The pole frequencies in FIG. 6 are scaled by the cut-off frequency of the equalizing filter. For example, in a read channel having a data rate of 400 Mbps, the cut-off frequency of the equalizing filter becomes about 100 MHZ. As a result, if the cut-off frequency of the equalizing filter is assumed to be 100 MHZ, from FIG. 6, for example, the pole frequency, that is, the cut-off frequency, of the third stage biquadratic filter 103 becomes 231.74 MHZ. Note that the combinations of the pole frequencies and Q factors in FIG. 6, that is, the pole arrangement, are those of xe2x80x9ca linear phase filter having a 0.05xc2x0 equiripple errorxe2x80x9d well known in filter design, but the invention is also applicable to other combinations of the pole frequencies and Q factors. The pole arrangement here is just an example.
The reproduced data rate of a disk medium differs by about 2.5 times between its inner track and outer track and is required to be adjustable to an optimal cut-off frequency by an external control means. At this time, all of the filter components, that is, the biquadratic filters and the low pass filter, have to have Q factors held at the values indicated in FIG. 6 at all times. Further, the ratios of pole frequencies of the biquadratic filters and the low pass filter have to be the ratios indicated in FIG. 6 regardless of the cut-off frequency of the equalizing filter as a whole. In other words, when adjusting the cut-off frequency of the equalizing filter as a whole in accordance with a change of the reproduced data rate, it is necessary that the component biquadratic filters and the low pass filter be monotonously increased or decreased in pole frequencies while maintaining constant Q factors.
Next, a method of designing the above cut-off frequency and Q factor will be explained by showing an example of the circuits of the components when configuring an equalizing filter by a Gm-C filter.
FIG. 7 shows the basic configuration of the biquadratic filters 102 and 103, while FIG. 8 shows a feed forward pulse slimming configuration used in the biquadratic filter/equalizer 101. Furthermore, FIG. 9 shows the configuration of a primary low pass filter 104.
FIG. 7 shows an example of the configuration of a biquadratic filter having a differential configuration. As shown in the figure, two integrators comprised of Gm-C""s are connected in cascade, while a negative feedback loop comprised of another Gm cell is connected to an output terminal thereof. Note that in FIG. 7, the load capacitance C is expressed as a differential capacitance, but generally 2C capacitances are connected between positive and negative signal lines and a ground potential. This is done so that capacitance can easily be set considering the amount of parasitic capacitance, and so that a function of phase compensation capacitance can be easily combined in a common-mode feedback loop.
The transfer function of the biquadratic filters 102 and 103 having the configuration shown in FIG. 7 and used as an equalizing filter is given by the formula below:                               Vlp          Vi                =                                            g              m1                        ⁢                                          g                m3                            /                              C                2                                                                        s              2                        +                          s              ⁡                              (                                                      g                    m2                                    /                  C                                )                                      +                          (                                                g                  m1                                ⁢                                                      g                    m3                                    /                                      C                    2                                                              )                                                          (        1        )            
Accordingly, the pole frequency xcfx890 and Q (quality factor) of a filter are expressed by the formulas below:                                           ω            0                    =                                                                      g                  m1                                ⁢                                  g                  m3                                                      C                          ,                  xe2x80x83                ⁢                  Q          =                                                                      g                  m1                                ⁢                                  g                  m3                                                                    g              m2                                                          (        2        )            
FIG. 8 shows an example of the configuration of an equalizing filter comprising an equalizer unit capable of adjusting a high pass boost by a feed forward amplifier K. The transfer function of the equalizing filter is given by the formula below.                               Vlp          Vi                =                                            (                                                g                  m1                                ⁢                                                      g                    m3                                    /                                      C                    2                                                              )                        -                          K              s              2                                                          s              2                        +                          s              ⁡                              (                                                      g                    m2                                    /                  C                                )                                      +                          (                                                g                  m1                                ⁢                                                      g                    m3                                    /                                      C                    2                                                              )                                                          (        3        )            
Similarly, the pole frequency xcfx890 and Q of the filter are expressed by the formulas below:                                           ω            0                    =                                                                      g                  m1                                ⁢                                  g                  m3                                                      C                          ,                  xe2x80x83                ⁢                  Q          =                                                                      g                  m1                                ⁢                                  g                  m3                                                                    g              m2                                                          (        4        )            
Here, the reason for realizing the high pass boost by the biquadratic filter/equalizer 101 is, as will be understood from FIG. 6, so that high pass boosting can be attained by a relatively small K. Therefore, realization of high pass boosting is not limited to the biquadratic filter/equalizer 101 and can be attained by other biquadratic filters.
FIG. 9 is an example of the configuration of the low pass filter 104. As shown in the figure, the transfer function of the filter is given by the formula below:                               Vlp          Vi                =                              (                                          g                m                            /              C                        )                                s            +                          (                                                g                  m                                /                C                            )                                                          (        5        )            
The pole frequency xcfx890 can be obtained as below.                               ω          0                =                              g            m                    C                                    (        6        )            
Realization of an equalizing filter having a constant group delay characteristic and a variable cut-off frequency is attained by setting the pole frequencies xcfx890 and Q of the biquadratic filters so as to satisfy the ratios of the pole frequencies and Q factors shown in FIG. 6. It is normally attained by controlling the gm of the biquadratic filters. According to formulas (1) to (5), it is theoretically possible to make the cut-off frequencies of the filters variable by changing the capacitances C, however, integration of variable capacitors such as varicaps in a standard CMOS production process should normally be avoided since it increases the number of steps in the production process and leads to a rise of costs. Note that in this case as well, it is general practice to change the capacitances connected to the Gm-C integrators in stages of, for example, units of C such as C, 2C, and 3C, or in units of 0.5C so as to coarsely change the cut-off frequency of a filter in a relatively wide range. The gm value is then controlled to continuously and finely adjust the cut-off frequency.
When the capacitance C is fixed, the two values xcfx890 and Q can be determined by adjusting the parameters of gm1, gm2, and gm3. Normally, the general practice is to set gm2=gm3 or gm1=gm3. By setting gm2=gm3, the formulas (2) and (4) can be rewritten to the formulas below:                                           ω            0                    =                                                                      g                  m1                                ⁢                                  g                  m2                                                      C                          ,                  xe2x80x83                ⁢                  Q          =                                                    g                m1                                            g                m2                                                                        (        7        )            
On the other hand, when gm1=gm3, the formulas (2) and (4) can be rewritten as follows:                                           ω            0                    =                                    g              m1                        C                          ,                  xe2x80x83                ⁢                  Q          =                                    g              m1                                      g              m2                                                          (        8        )            
In each of the above cases, xcfx890 can also be linearly changed while maintaining Q at a constant value by linearly changing all gm""s of the biquadratic filter. For example, if both gm1 and gm2 are doubled, the cut-off frequency xcfx890 can also be doubled while maintaining Q at a constant value.
As will be understood from the above explanation, when designing a Gm-C configuration biquadratic filter and first-order low pass filter, it is preferable that the gm values of the Gm-C integrators which compose whole filter can be controlled by an external means and can be controlled linearly.
In the related art, a silicon bipolar element has been used for such high frequency filter applications. In a bipolar element, as is well known, the gm (hereinafter expressed by gm,bip to distinguish it from the gm of a MOS transistor) is indicated by the formula below:                               g                      m            ,            bip                          =                                            ∂                              ∂                                  V                  BE                                                      ⁢                          (                                                I                  s                                ⁢                exp                ⁢                                  xe2x80x83                                ⁢                                                      V                    BE                                                        V                    T                                                              )                                =                                                                      I                  S                                                  V                  T                                            ⁢              exp              ⁢                              xe2x80x83                            ⁢                                                V                  BE                                                  V                  T                                                      =                                          I                C                                            V                T                                                                        (        9        )            
According to formula (9), the gm,bip of a bipolar transistor is proportional to the collector current IC, so the gm,bip can be linearly changed relatively easily.
On the other hand, a PRML read channel function is inseparable from the above Viterbi decoding and follows digital processing as represented by the Reed Solomon error correction algorithm. There is a strong demand for analog PR equalization in a CMOS production process coexisting on the same die along with such purely digital processing blocks.
As is well known, the gm of a MOS element (hereinafter expressed as gm,MOS for clarification) is indicated by the formula below:                               g                      m            ,            MOS                          =                                            ∂                              ∂                                  V                  GS                                                      ⁢                          (                                                K                  ⁡                                      (                                                                  V                        GS                                            -                                              V                        th                                                              )                                                  2                            )                                =                                    2              ⁢                                                KI                  D                                                      =                          2              ⁢                              KV                eff                                                                        (        10        )            
Here, Vth is the threshold voltage of a MOS transistor, K=xcexcCox/2L, and Veff=VGSxe2x88x92Vth.
When comparing formula (10) and formula (9), the gm of a bipolar element is linear with respect to the collector current IC, while the gm of a CMOS element is linear with respect to the square root of the drain current ID. Thus, in the case of a CMOS element, when controlling the gm by changing the drain current ID by some external means, it is normally preferable in terms of controllability to provide a conversion mechanism for compensating for the above root characteristic for each of the transconductors and to change linearly from the minimum gm,min to the maximum gm,max in the variable range.
Summarizing the problems to be solved by the invention, in an equalizing filter configured by CMOS elements of the related art, for example, the cut-off frequency of the PR equalizing filter is adjusted by an adjusting means of about 5 to 6 bits width. In this case, a conversion mechanism for correcting the above root characteristic can also be realized by, for example, processing a digital domain by a lookup table such that the root characteristic can be compensated for in an analog domain as well.
However, in any case, this leads to an increase of the circuit area due to the additional circuits and an increase of power consumption and causes deterioration of the filter characteristic itself.
Also, as another disadvantage, when controlling the gm of a CMOS element by the drain current ID, some kind of linearizing means is generally required. Consequently, there arises a disadvantage that the inherent transconductance of a CMOS element cannot be obtained as a circuit gm. Furthermore, an increase of the circuit area and an increase of power consumption are inevitable.
For example, in a differential circuit comprised of MOS transistors shown in FIG. 10, the gm""s of the MOS transistors can be controlled by a bias current IB. The relationship is expressed by the formula below:                               I1          -          I2                =                              K            ⁡                          (                              V1                -                V2                            )                                ⁢                                                                      2                  ⁢                                      I                    B                                                  K                            -                                                (                                      V1                    -                    V2                                    )                                2                                                                        (        11        )            
As shown in formula (11), a non-linear term is included. As a result, linearization by a variety of linearizing means is necessary. The gm""s obtained thereby become much smaller than the inherent gm,MOS values of the MOS elements indicated in formula (10).
An object of the present invention is to provide a transconductor and a filter circuit capable of suppressing an increase of circuit area, enabling easy circuit design, realizing a reduction of power consumption by a common control voltage operation, and able to stably control the cut-off frequency.
To attain the above object, according to a first aspect of the present invention, there is provided a transconductor comprising a differential circuit including a first MOS transistor having a gate connected to a positive input terminal, a source grounded, and a drain connected to a first current source supplying a first operation current, and a second MOS transistor having a gate connected to a negative input terminal, a source grounded, and a drain connected to a second current source supplying a second operation current and including a control circuit for controlling the output currents of the first and second current sources in accordance with common-mode output voltage of the differential pair (which is comprised of the first and the second MOS transistors) and a predetermined reference potential.
According to a second aspect of the present invention, there is provided a filter circuit comprising a transconductor-C circuit (Gm-C circuit) including at least two transconductors and a load capacitor driven by the transconductors and a common-mode voltage control circuit for supplying a control signal for setting output common-mode voltage of the transconductors to be identical. Each transconductor includes a first MOS transistor having a gate connected to a positive input terminal, a source grounded, and a drain connected to a first current source supplying a first operation current and a second MOS transistor having a gate connected to a negative input terminal, a source grounded, and a drain connected to a second current source supplying a second operation current.
Preferably, the common-mode voltage control circuit generates the control signal in accordance with common-mode output voltage of the differential pair comprised of the first and second MOS transistors and a predetermined reference potential.
More preferably, the common-mode voltage control circuit generates the control signal so that an average voltage of the output signals output from the differential circuit comprised of the first and second MOS transistors becomes identical to the reference voltage.
Preferably, the common-mode voltage to be input to the gates of the first and second transistors is controlled to a desired transconductance value.
More preferably, the ratios of channel width and channel length of the first and second transistors are set to desired transconductance values.